(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of improving gate oxide quality in the fabrication of integrated circuits.
(2) Description of the Prior Art
In the fabrication of integrated circuits, a layer of gate silicon oxide typically is grown on the surface of a monocrystalline silicon semiconductor substrate. A polysilicon layer is deposited overlying the gate oxide layer and patterned to form polysilicon gate electrodes. Penetration of the gate oxide layer by impurities can cause crystal damage in both oxide and silicon. Crystal damage can be annealed out. Damage is caused by energy imparted by the impurities to thin films.
Current practice is to passivate the oxide/silicon interface with chlorine using Cl.sub.2, TCA or TCE. Interface passivation helps create an impact-resistant interface resulting in a smaller change in interface trap charges. Interface trap charges physically reside at the oxide/silicon interface and are believed to be due to incomplete bondings between silicon and silicon dioxide. A smaller change in interface trap charges leads to better oxide quality. However, upon exposure to radiation and/or plasma processes, the conventional means of passivation may no longer work.
U. S. Pat. 5,393,676 to Anjum et al discloses implanting Ar ions into polysilicon deeper than subsequent implantation of BF.sub.2. The presence of-the Ar ions prevents F ions from penetrating the underlying gate oxide. Nitrogen and fluorine have been identified as suitable elements for interface passivation as stronger interface bonds could be achieved. Nitrogen passivation has the advantage of being able to block boron ions from entering the oxide layer. Fluorine incorporation, on the other hand, can assist boron penetration into the oxide layer if given excessively. However, a significant advantage of fluorine passivation over nitrogen passivation is a higher low-field mobility which may be critical to device performance.
In their paper, "Suppressed Process-Induced Damage in N.sub.2 O-annealed SiO.sub.2 Gate Dielectrics," by A. B. Joshi et al, IEEE - IRPS c. 1995, pp. 156-161, the authors discuss incorporating both nitrogen and fluorine to passivate the oxide/silicon interface by implanting fluorine ions into oxynitride through a polysilicon layer of suitable thickness. A process window for fluorine was previously determined. This process window was observed to be significantly narrower when switched from oxide to oxynitride followed by fluorination.
U. S. Pat. 4,897,368 to Kobushi et al implants nitrogen ions into a polysilicon layer followed by deposition of a titanium layer. The nitrogen ions in the polysilicon react with the titanium to form an alloy layer of uniform thickness. U.S. Pat. 5,108,935 to Rodder teaches implanting fluorine ions into the channel or base region of a semiconductor substrate to reduce hot carrier problems.
An alternative way to incorporate both elements into oxide would be to implant both nitrogen and fluorine ions through a layer of polysilicon.